EDN

Assertion Methodologies for Verilog Design

Sometimes good ideas take a while to catch on in engineering practice. The use of in-line assertions to document assumptions and check for problems in RTL code is one such idea. Long ago proposed for ...
Electronics Weekly

Using Verilog-A simulation in analogue design

A key part of any analogue design flow is having models of the components for simulation. Traditional Spice models of basic components such as transistors and capacitors written in C or C++ are ...
Electronic Design

A Look Back At Verilog

Never in my wildest dreams did I think that the Verilog hardware description language (HDL) would spawn an industry and be a fixture of electronics design for more than 15 years. HDLs were a ...
Design-Reuse

Synopsys VCS Verilog Simulator Incorporates Breakthrough Verification Capabilities

MOUNTAIN VIEW, Calif.--(BUSINESS WIRE)--Sept. 26, 2001-- Synopsys, Inc. (Nasdaq:SNPS), the technology leader for complex IC design, today announced VCS(TM) 6.0.1, the latest release of the industry's ...
EDN

Verilog design tool supports encrypted IP

VeriLogger Extreme, a compiled-code Verilog simulation and debugging environment, now features support for encrypted IP models from all the major ASIC/FPGA vendors. The package supports both ...
Design-Reuse

Fintronic's SuperFinSim Verilog Simulator accelerated through tight integration with Novas Debussy Debug System

FOSTER CITY, Calif.-- July 18, 2003--Fintronic USA, Inc., a leading provider of high-performance Verilog simulators announced the release of an API-based interface between Super FinSim? and the ...
Embedded

Verilog design projects (VIDEOS!!)

Here is the link to a list of videos found by Google’s Video Search engine demonstrating a variety of design projects created using the Verilog Hardware Design Language. It has been organized by date, ...
Electronic Design

Verilog-AMS Update Integrates With HDL Standard

The latest version of Accellera’s Verilog-Analog Mixed-Signal (AMS) standard, Verilog-AMS 2.3, unifies the standard’s previous version with IEEE Std. 1364-2005, the Verilog hardware description ...
Electronics Weekly

Hardware design needs software shift

When I read the announcement from the EDA Consortium that Phil Moorby, creator of Verilog, was to be given the 2005 Kaufman Award, my immediate reaction was one of pride and optimism. Here was a man ...